Low density USB access line ARM based 32 bit MCU with

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Contents STM32F102x4 STM32F102x6,1 Introduction 7,2 Description 8. 2 1 Device overview 9,2 2 Full compatibility throughout the family 12. 2 3 Overview 12,3 Pinout and pin description 19,4 Memory mapping 23. 5 Electrical characteristics 24,5 1 Parameter conditions 24. 5 1 1 Minimum and maximum values 24,5 1 2 Typical values 24.
5 1 3 Typical curves 24,5 1 4 Loading capacitor 24. 5 1 5 Pin input voltage 24,5 1 6 Power supply scheme 25. 5 1 7 Current consumption measurement 26,5 2 Absolute maximum ratings 26. 5 3 Operating conditions 28,5 3 1 General operating conditions 28. 5 3 2 Operating conditions at power up power down 28. 5 3 3 Embedded reset and power control block characteristics 29. 5 3 4 Embedded reference voltage 29,5 3 5 Supply current characteristics 30.
5 3 6 External clock source characteristics 39,5 3 7 Internal clock source characteristics 43. 5 3 8 PLL characteristics 44,5 3 9 Memory characteristics 45. 5 3 10 EMC characteristics 46, 5 3 11 Absolute maximum ratings electrical sensitivity 47. 5 3 12 I O current injection characteristics 48,2 78 DocID15057 Rev 5. STM32F102x4 STM32F102x6 Contents,5 3 13 I O port characteristics 48.
5 3 14 NRST pin characteristics 54,5 3 15 TIM timer characteristics 56. 5 3 16 Communications interfaces 56,5 3 17 12 bit ADC characteristics 62. 5 3 18 Temperature sensor characteristics 66,6 Package characteristics 67. 6 1 LQFP64 package information 67,6 2 LQFP48 package information 70. 6 3 Thermal characteristics 73,6 4 Reference document 73.
6 4 1 Evaluating the maximum junction temperature for an application 74. 7 Ordering information scheme 75,8 Revision history 76. DocID15057 Rev 5 3 78,List of tables STM32F102x4 STM32F102x6. List of tables,Table 1 Device summary 1, Table 2 STM32F102x4 and STM32F102x6 low density USB access line features. and peripheral counts 9,Table 3 STM32F102xx USB access line family 12. Table 4 Low density STM32F102xx pin definitions 20. Table 5 Voltage characteristics 26,Table 6 Current characteristics 27.
Table 7 Thermal characteristics 27,Table 8 General operating conditions 28. Table 9 Operating conditions at power up power down 28. Table 10 Embedded reset and power control block characteristics 29. Table 11 Embedded internal reference voltage 30, Table 12 Maximum current consumption in Run mode code with data processing. running from Flash 31, Table 13 Maximum current consumption in Run mode code with data processing. running from RAM 31, Table 14 Maximum current consumption in Sleep mode code running from Flash or RAM 33. Table 15 Typical and maximum current consumptions in Stop and Standby modes 33. Table 16 Typical current consumption in Run mode code with data processing. running from Flash 36, Table 17 Typical current consumption in Sleep mode code running from Flash or RAM 37.
Table 18 Peripheral current consumption 38, Table 19 High speed external user clock characteristics 39. Table 20 Low speed external user clock characteristics 39. Table 21 HSE 4 16 MHz oscillator characteristics 41. Table 22 LSE oscillator characteristics fLSE 32 768 kHz 42. Table 23 HSI oscillator characteristics 43,Table 24 LSI oscillator characteristics 44. Table 25 Low power mode wakeup timings 44,Table 26 PLL characteristics 45. Table 27 Flash memory characteristics 45, Table 28 Flash memory endurance and data retention 45. Table 29 EMS characteristics 46,Table 30 EMI characteristics 47.
Table 31 ESD absolute maximum ratings 47,Table 32 Electrical sensitivities 47. Table 33 I O current injection susceptibility 48,Table 34 I O static characteristics 49. Table 35 Output voltage characteristics 52,Table 36 I O AC characteristics 53. Table 37 NRST pin characteristics 54,Table 38 TIMx characteristics 56. Table 39 I2C characteristics 57, Table 40 SCL frequency fPCLK1 36 MHz VDD I2C 3 3 V 58.
Table 41 SPI characteristics 59,Table 42 USB startup time 61. Table 43 USB DC electrical characteristics 62, Table 44 USB Full speed electrical characteristics of the driver 62. 4 78 DocID15057 Rev 5,STM32F102x4 STM32F102x6 List of tables. Table 45 ADC characteristics 63,Table 46 RAIN max for fADC 12 MHz 64. Table 47 ADC accuracy limited test conditions 64,Table 48 ADC accuracy 64.
Table 49 TS characteristics 66, Table 50 LQFP64 64 pin 10 x 10 mm low profile quad flat. package mechanical data 67, Table 51 LQFP48 48 pin 7 x 7 mm low profile quad flat package. mechanical data 71,Table 52 Package thermal characteristics 73. Table 53 Ordering information scheme 75,Table 54 Document revision history 76. DocID15057 Rev 5 5 78,List of figures STM32F102x4 STM32F102x6.
List of figures, Figure 1 STM32F102T8 medium density USB access line block diagram 10. Figure 2 Clock tree 11, Figure 3 STM32F102xx medium density USB access line LQFP48 pinout 19. Figure 4 STM32F102xx medium density USB access line LQFP64 pinout 19. Figure 5 Memory map 23,Figure 6 Pin loading conditions 25. Figure 7 Pin input voltage 25,Figure 8 Power supply scheme 25. Figure 9 Current consumption measurement scheme 26. Figure 10 Typical current consumption in Run mode versus temperature at 3 6 V. code with data processing running from RAM peripherals enabled 32. Figure 11 Typical current consumption in Run mode versus temperature at 3 6 V. code with data processing running from RAM peripherals disabled 32. Figure 12 Typical current consumption on VBAT with RTC on versus temperature at different. VBAT values 34, Figure 13 Typical current consumption in Stop mode with regulator in Run mode versus.
temperature at VDD 3 3 V and 3 6 V 34, Figure 14 Typical current consumption in Stop mode with regulator in Low power mode versus. temperature at VDD 3 3 V and 3 6 V 35, Figure 15 Typical current consumption in Standby mode versus temperature at VDD 3 3 V and. Figure 16 High speed external clock source AC timing diagram 40. Figure 17 Low speed external clock source AC timing diagram 40. Figure 18 Typical application with an 8 MHz crystal 42. Figure 19 Typical application with a 32 768 kHz crystal 43. Figure 20 Standard I O input characteristics CMOS port 50. Figure 21 Standard I O input characteristics TTL port 50. Figure 22 5 V tolerant I O input characteristics CMOS port 51. Figure 23 5 V tolerant I O input characteristics TTL port 51. Figure 24 I O AC characteristics definition 54,Figure 25 Recommended NRST pin protection 55. Figure 26 I2C bus AC waveforms and measurement circuit 1 58. Figure 27 SPI timing diagram slave mode and CPHA 0 60. Figure 28 SPI timing diagram slave mode and CPHA 1 1 60. Figure 29 SPI timing diagram master mode 1 61, Figure 30 USB timings definition of data signal rise and fall time 62. Figure 31 ADC accuracy characteristics 65, Figure 32 Typical connection diagram using the ADC 65.
Figure 33 Power supply and reference decoupling 66. Figure 34 LQFP64 64 pin 10 x 10 mm low profile quad flat package outline 67. Figure 35 LQFP64 64 pin 10 x 10 mm low profile quad flat package. recommended footprint 68, Figure 36 LQFP64 marking example package top view 69. Figure 37 LQFP48 48 pin 7 x 7 mm low profile quad flat package outline 70. Figure 38 LQFP48 48 pin 7 x 7 mm low profile quad flat package. recommended footprint 72, Figure 39 LQFP48 marking example package top view 72. Figure 40 LQFP64 PD max vs TA 74,6 78 DocID15057 Rev 5. Introduction STM32F102x4 STM32F102x6,1 Introduction. This datasheet provides the ordering information and mechanical device characteristics of. STM32F102x4 and STM32F102x6 low density USB access line microcontrollers For more. details on the whole STMicroelectronics STM32F102xx family please refer to Section 2 2. Full compatibility throughout the family, The medium density STM32F102xx datasheet should be read in conjunction with the low.
medium and high density STM32F10xxx reference manual. For information on programming erasing and protection of the internal Flash memory. please refer to the STM32F10xxx Flash programming manual. The reference and Flash programming manuals are both available from the. STMicroelectronics website www st com, For information on the Cortex M3 core please refer to the Cortex M3 Technical Reference. Manual available from the ARM website,7 78 DocID15057 Rev 5. STM32F102x4 STM32F102x6 Description,2 Description, The STM32F102xx medium density USB access line incorporates the high performance. ARM Cortex M3 32 bit RISC core operating at a 48 MHz frequency high speed. embedded memories Flash memory of 16 or 32 Kbytes and SRAM of 4 or 6 Kbytes and. an extensive range of enhanced peripherals and I Os connected to two APB buses All. devices offer standard communication interfaces one I2C one SPI one USB and two. USARTs one 12 bit ADC and two general purpose 16 bit timers. The STM32F102xx family operates in the 40 to 85 C temperature range from a 2 0 to. 3 6 V power supply A comprehensive set of power saving mode allows the design of low. power applications, The STM32F102xx medium density USB access line is delivered in the LQFP48 7 7 mm. and LQFP64 10 10 mm packages, The STM32F102xx medium density USB access line microcontrollers are suitable for a.
wide range of applications,Application control and user interface. Medical and handheld equipment,PC peripherals gaming and GPS platforms. Industrial applications PLC inverters printers and scanners. Alarm systems Video intercom and HVAC, Figure 1 shows the general block diagram of the device family. DocID15057 Rev 5 8 78,Description STM32F102x4 STM32F102x6. 2 1 Device overview, Table 2 STM32F102x4 and STM32F102x6 low density USB access line features.
and peripheral counts,Peripheral STM32F102Cx STM32F102Rx. Flash Kbytes 16 32 16 32,SRAM Kbytes 4 6 4 6,Timers General purpose 2 2 2 2. SPI 1 1 1 1,Communication I2C 1 1 1 1,interfaces USART 2 2 2 2. USB 1 1 1 1,12 bit synchronized ADC 1 1,number of channels 10 channels 16 channels. GPIOs 37 51,CPU frequency 48 MHz,Operating voltage 2 0 to 3 6 V.
Ambient temperature 40 to 85 C see Table 8,Operating temperatures. Junction temperature 40 to 105 C see Table 8,Packages LQFP48 LQFP64. 9 78 DocID15057 Rev 5,STM32F102x4 STM32F102x6 Description. Figure 1 STM32F102T8 medium density USB access line block diagram. TRACED 0 3 TPIU,as AS Trace trig Trace,SWD pbus POWER. JNTRST SW JTAG Controller,VDD 2 to 3 6 V,JTCK SWCLK VSS.
Cortex M3 CPU Ibus 3 3 V to 1 8 V,Inte rface,JTMS SWDIO Flash 32 KB. JTDO 64 bit VDD,as AF Fmax 48 MHz Dbus,BusM atrix,NVIC Syst em. PCLK1 OSC IN,GP DMA PCLK 2 PLL XTAL OSC OSC OUT,CLOCK 4 16 MHz. 7 channels HCLK MANAGT,AHB Fmax 48 MHz,VDDA in terface. SUPPLY VBAT,NRST SUPERVISION,VDDA POR PDR Rst OSC32 IN.
VSSA XTAL 32 kHz,RTC Backup,AHB2 AHB2 reg TAMPER RTC. APB2 APB 1 AWU,EXTI Backup interface,TIM2 4 Chann els. PA 15 1 GPIOA,4 Chann els,APB 1 Fmax 24 MHz,PB 15 0 GPIOB. RX TX CTS RTS,USART2 CK SmartCard as AF,PC 15 0 GPIOC. I2C SCL SDA SMBA L,PD 2 0 GPIOD as AF,APB2 Fmax 48 MHz.
MOSI MISO USB 2 0 FS USBDP USBDM as AF,SCK NSS as AF SPI. RX TX CTS RTS WWDG,Smart Card as AF USART1,16AF 12bit ADC1 IF. Temp sen so r,1 AF alternate function on I O port pin. 2 TA 40 C to 85 C junction temperature up to 105 C. DocID15057 Rev 5 10 78,Description STM32F102x4 STM32F102x6. Figure 2 Clock tree,4O LASH PROG IF 4,0RESCALER TO 53 INTERFACE.
Z MAX TO BUS CORE,LOCK MEMORY AND,NABLE BITS,TO ORTEX 3YSTEM TIMER. 3 FREE RUNNING CLOCK,0RESCALER 0RESCALER,0 MAX PERIPHERALS. 0ERIPHERAL LOCK,NABLE BITS,4 4 TO 4 4,F 0 PRESCALER X 4 8. ELSE X 0ERIPHERAL LOCK,NABLE BITS,Z PERIPHERALS,0ERIPHERAL LOCK. 3 3 NABLE BITS,TO NDEPENDENT 7ATCHDOG 7,K Z 7 EGEND.
3 HIGH SPEED EXTERNAL CLOCK SIGNAL,3 HIGH SPEED INTERNAL CLOCK SIGNAL. AIN 0 3 LOW SPEED INTERNAL CLOCK SIGNAL,LOCK UTPUT 3 LOW SPEED EXTERNAL CLOCK SIGNAL. 1 For the USB function to be available both HSE and PLL must be enabled with the USB clock output. USBCLK at 48 MHz, 2 To have an ADC conversion time of 1 2 s APB2 must be at 12 MHz 24 MHz or 48 MHz. 3 The Flash memory programming interface clock FLITFCLK is always the HSI clock. 11 78 DocID15057 Rev 5,STM32F102x4 STM32F102x6 Description. 2 2 Full compatibility throughout the family, The STM32F102xx is a complete family whose members are fully pin to pin software and.
feature compatible In the reference manual the STM32F102x4 and STM32F102x6 are. referred to as low density devices and the STM32F102x8 and STM32F102xB are referred. to as medium density devices, Low density devices are an extension of the STM32F102x8 B devices they are specified in. the STM32F102x4 6 datasheet Low density devices feature lower Flash memory and RAM. capacities a timer and a few communication interfaces less. The STM32F102x4 and STM32F102x6 are a drop in replacement for the STM32F102x8 B. medium density devices allowing the user to try different memory densities and providing a. greater degree of freedom during the development cycle. Moreover the STM32F102xx family is fully compatible with all existing STM32F101xx. access line and STM32F103xx performance line devices. This is information on a product in full production May 2015 DocID15057 Rev 5 1 78 STM32F102x4 STM32F102x6 Low density USB access line ARM based 32 bit MCU with 16 32 KB Flash USB FS 5 timers ADC amp 5 com interfaces

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